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Transient fault modeling and fault injection simulation
dc.creator | Yuan, Xuejun | |
dc.date.accessioned | 2012-06-07T22:47:34Z | |
dc.date.available | 2012-06-07T22:47:34Z | |
dc.date.created | 1996 | |
dc.date.issued | 1996 | |
dc.identifier.uri | https://hdl.handle.net/1969.1/ETD-TAMU-1996-THESIS-Y83 | |
dc.description | Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item. | en |
dc.description | Includes bibliographical references: p. 63-65. | en |
dc.description | Issued also on microfiche from Lange Micrographics. | en |
dc.description.abstract | An accurate transient fault model is presented in this thesis. A 7-term exponential current upset model is derived from the results of a device-level, 3-dimensional, single-event-upset simulation. A curve-fitting algorithm is used to extract the numerical model from the empirical data. The model is implemented in a HSPICE simulation environment as a current-injection source for fault simulation. The current transient model is used to conduct electrical-level fault injection simulations on a static RAM cell and subcircuits from two commercial microprocessors. The results from the 7-term exponential model are compared with the results from the widely accepted double-exponential transient model. The experimental data indicate that, for a given charge level, the 7-term exponential fault model results in a higher chance of having a latch error. More importantly, different latch-error patterns are captured from the target circuits under the new fault model. | en |
dc.format.medium | electronic | en |
dc.format.mimetype | application/pdf | |
dc.language.iso | en_US | |
dc.publisher | Texas A&M University | |
dc.rights | This thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use. | en |
dc.subject | electrical engineering. | en |
dc.subject | Major electrical engineering. | en |
dc.title | Transient fault modeling and fault injection simulation | en |
dc.type | Thesis | en |
thesis.degree.discipline | electrical engineering | en |
thesis.degree.name | M.S. | en |
thesis.degree.level | Masters | en |
dc.type.genre | thesis | en |
dc.type.material | text | en |
dc.format.digitalOrigin | reformatted digital | en |
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