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dc.creatorThoppae, Mothi M
dc.date.accessioned2012-06-07T23:18:54Z
dc.date.available2012-06-07T23:18:54Z
dc.date.created2002
dc.date.issued2002
dc.identifier.urihttps://hdl.handle.net/1969.1/ETD-TAMU-2002-THESIS-T47
dc.descriptionDue to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item.en
dc.descriptionIncludes bibliographical references (leaves 48-51).en
dc.descriptionIssued also on microfiche from Lange Micrographics.en
dc.description.abstractThe technique of predicting branch directions before execution is defined as branch prediction. Conditional branches pose a hazard to the instruction flow since the instruction that executes after the branch is not known. When a branch appears, the next instruction is not known till the branch is executed. Either instruction fetch has to be halted or the branch direction has to be predicted. With some degree of probability the latter method of predicting branch directions has yielded good results. Several authors have suggested ways of predicting the direction of conditional branches with hardware that uses the history of previous branches. The branches are predicted statically, which occurs during compile time, or dynamically, which occurs during run-time. Dynamic methods have shown the better performance over static schemes. They employ one or two levels of history information and prediction accuracy scales proportional to the history information. So employing larger branch tables, which store the branch histories, we get good performance With reducing chip area, larger tables would occupy a significant portion of chip area. We propose a technique called software branch prediction, where the branch tables reside in the physical memory along with the application. The branch tables no longer reside in the hardware and so chip area occupied by the tables is freed. Software branch prediction performs as well as hardware predictions in terms of prediction accuracy, but the execution time of the application is increased by 50 - 100 %. Since accessing software tables takes longer than hardware tables, the execution time is higher. We need to identify ways to reduce the execution time. We propose one such mechanism called pivot branches. Pivot branches are branches whose execution can determine the direction taken by a few or more branches. We could predict more than one branch direction by correctly predicting pivot branches at one time. Two different methods were attempted to determine the existence of pivot branches. They are code inspection and inter-procedural path profiling. Path profiling was done on two SPEC benchmarks. The results did not clearly indicate if pivot branches exist, but it shows that there are gains doing predictions this way.en
dc.format.mediumelectronicen
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherTexas A&M University
dc.rightsThis thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use.en
dc.subjectcomputer engineering.en
dc.subjectMajor computer engineering.en
dc.titleSoftware branch prediction via inter-procedural path profilingen
dc.typeThesisen
thesis.degree.disciplinecomputer engineeringen
thesis.degree.nameM.S.en
thesis.degree.levelMastersen
dc.type.genrethesisen
dc.type.materialtexten
dc.format.digitalOriginreformatted digitalen


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