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Threshold voltage extraction circuit
| dc.creator | Hoon, Siew Kuok | |
| dc.date.accessioned | 2012-06-07T22:59:34Z | |
| dc.date.available | 2012-06-07T22:59:34Z | |
| dc.date.created | 2000 | |
| dc.date.issued | 2000 | |
| dc.identifier.uri | https://hdl.handle.net/1969.1/ETD-TAMU-2000-THESIS-H643 | |
| dc.description | Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item. | en |
| dc.description | Includes bibliographical references (leaves 119-121). | en |
| dc.description | Issued also on microfiche from Lange Micrographics. | en |
| dc.description.abstract | A novel optimally self-biasing MOSFET threshold-voltage (V[]) extractor circuit is presented. It implements the most popular industrial extraction algorithm of biasing a saturated MOSFET to the linear portion of its [] versus [] characteristic, and extrapolating the tangential line to [] axis. The proposed circuit performs both tasks automatically in continuous time regardless of the dimensions and technology of the device under test. A simple feedback loop utilizing a differential difference amplifier (DDA) accomplishes auto biasing, while another DDA calculates the extrapolated value. The circuit is applicable to both NMOS and PMOS devices. The thesis presents the proposed extraction concept, describes the technique and circuit architecture, and verifies functionality by comparing simulated and experimental results with graphically extracted values. As a form of comparison, another [] extraction circuit has been designed and fabricated. This circuit is similar to the majority of the published extractors but it alleviates some of the problems associated with them. Various circuit performance issues are investigated including power-supply variations and temperature dependence. | en |
| dc.format.medium | electronic | en |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en_US | |
| dc.publisher | Texas A&M University | |
| dc.rights | This thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use. | en |
| dc.subject | electrical engineering. | en |
| dc.subject | Major electrical engineering. | en |
| dc.title | Threshold voltage extraction circuit | en |
| dc.type | Thesis | en |
| thesis.degree.discipline | electrical engineering | en |
| thesis.degree.name | M.S. | en |
| thesis.degree.level | Masters | en |
| dc.type.genre | thesis | en |
| dc.type.material | text | en |
| dc.format.digitalOrigin | reformatted digital | en |
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