Low Density Parity Check Decoder
Abstract
A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message.
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Citation
Gunnam, Kiran Kumar; Choi, Gwan S. (6/21). Low Density Parity Check Decoder. United States. Patent and Trademark Office; Texas A&M University. Libraries. Available electronically from https : / /hdl .handle .net /1969 .1 /196772.