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dc.contributor.advisorMahapatra, Rabi
dc.creatorMohan, Suneil
dc.date.accessioned2012-07-16T15:58:09Z
dc.date.accessioned2012-07-16T20:30:33Z
dc.date.available2014-09-16T07:28:21Z
dc.date.created2012-05
dc.date.issued2012-07-16
dc.date.submittedMay 2012
dc.identifier.urihttps://hdl.handle.net/1969.1/ETD-TAMU-2012-05-10938
dc.description.abstractSemantic Routed Networks provide a superior infrastructure for complex search engines. In a Semantic Routed Network (SRN), the routers are the critical component and they perform semantic comparison as their key computation. As the amount of information available on the Internet grows, the speed and efficiency with which information can be retrieved to the user becomes important. Most current search engines scale to meet the growing demand by deploying large data centers with general purpose computers that consume many megawatts of power. Reducing the power consumption of these data centers while providing better performance, will help reduce the costs of operation significantly. Performing operations in parallel is a key optimization step for better performance on general purpose CPUs. Current techniques for parallelization include architectures that are multi-core and have multiple thread handling capabilities. These coarse grained approaches have considerable resource management overhead and provide only sub-linear speedup. This dissertation proposes techniques towards a highly parallel, power efficient architecture that performs semantic comparisons as its core activity. Hardware-centric parallel algorithms have been developed to populate the required data structures followed by computation of semantic similarity. The performance of the proposed design is further enhanced using a pipelined architecture. The proposed algorithms were also implemented on two contemporary platforms such as the Nvidia CUDA and an FPGA for performance comparison. In order to validate the designs, a semantic benchmark was also been created. It has been shown that a dedicated semantic comparator delivers significantly better performance compared to other platforms. Results show that the proposed hardware semantic comparison architecture delivers a speedup performance of up to 10^5 while reducing power consumption by 80% compared to traditional computing platforms. Future research directions including better power optimization, architecting the complete semantic router and using the semantic benchmark for SRN research are also discussed.en
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.subjectSemantic Comparisonen
dc.subjectSemantic Networksen
dc.subjectHardware Architectureen
dc.subjectParallel Algorithmsen
dc.titleHardware Architecture for Semantic Comparisonen
dc.typeThesisen
thesis.degree.departmentComputer Science and Engineeringen
thesis.degree.disciplineComputer Engineeringen
thesis.degree.grantorTexas A&M Universityen
thesis.degree.nameDoctor of Philosophyen
thesis.degree.levelDoctoralen
dc.contributor.committeeMemberWalker, Duncan M.
dc.contributor.committeeMemberBettati, Riccardo
dc.contributor.committeeMemberKundur, Deepa
dc.type.genrethesisen
dc.type.materialtexten
local.embargo.terms2014-07-16


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