Digitally Assisted Multi-Channel Receivers

Abstract

This work presents a data estimation scheme for wide band multi-channel charge sampling receivers with sinc filter banks together with a complete system calibration and synchronization algorithm for the receiver. A unified model has been defined for the receiver containing all first order mismatches, offsets and imperfections and a technique based on least mean squares algorithm is employed to track these errors. The performance of this technique under noisy channel conditions has been verified. The sinc filter bank is compared with the conventional analog filter banks and it is shown that the sinc filter banks have very low computational complexity in data estimation Nextly, analytical tools for the design of clock-jitter tolerant multi-channel filterbank receivers have been developed. Clock-jitter is one of the most fundamental obstacles for the future generation of wideband receivers. Additionally all the trade-offs and specifications of a design example for a multi-channel receiver that can process a 5 GHz baseband signal with 40 dB of signal-to-noise-ratio (SNR) using sampling clocks that can tolerate up to 5 ps of clock-jitter standard deviation are presented. A novel bandwidth optimization technique has been presented. As a part of it the bandwidth of the filters present in each path is optimized thereby improving the performance of the receiver further in the presence of sampling clock jitter. The amount of bandwidth reduction possible depends on the order of the filter and the noise amplification provided by the reconstruction matrix. It has been shown that 3rd order filters of bandwidth 1 GHz can be replaced with 1st order filters of bandwidth 100 MHz without any depreciation in the output resolution, implying huge power savings.