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An analysis of test effectiveness via surrogate simulation of a commercial IC
dc.creator | Wicker, Jason David | |
dc.date.accessioned | 2012-06-07T23:10:15Z | |
dc.date.available | 2012-06-07T23:10:15Z | |
dc.date.created | 2001 | |
dc.date.issued | 2001 | |
dc.identifier.uri | https://hdl.handle.net/1969.1/ETD-TAMU-2001-THESIS-W344 | |
dc.description | Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item. | en |
dc.description | Includes bibliographical references (leaves 34-36). | en |
dc.description | Issued also on microfiche from Lange Micrographics. | en |
dc.description.abstract | Choosing which test sets to apply to a commercial design is important in order to efficiently achieve low defective part levels. This work compares a test set created by the DO-RE-ME process utilizing the MPG-D defective part level model that maximizes observation at problem sites with a commercial automatic test pattern generation test set that utilizes stuck-at faults to generate tests and to estimate defective part level. Incorporated in this comparison are stuck-at fault predictions, MPG-D predictions, and bridging surrogate simulation results. In contrast to standard commercial practice, the MPG-D model also allows analysis on a fault-by-fault basis and on a pattern-by-pattern basis. | en |
dc.format.medium | electronic | en |
dc.format.mimetype | application/pdf | |
dc.language.iso | en_US | |
dc.publisher | Texas A&M University | |
dc.rights | This thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use. | en |
dc.subject | electrical engineering. | en |
dc.subject | Major electrical engineering. | en |
dc.title | An analysis of test effectiveness via surrogate simulation of a commercial IC | en |
dc.type | Thesis | en |
thesis.degree.discipline | electrical engineering | en |
thesis.degree.name | M.S. | en |
thesis.degree.level | Masters | en |
dc.type.genre | thesis | en |
dc.type.material | text | en |
dc.format.digitalOrigin | reformatted digital | en |
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