Design error diagnosis and correction in digital circuits

Abstract

As the design of digital systems is becoming Micrographics. increasingly complex, an undetected design error in the late phase of the design process may have catastrophic consequences. It is thus very important to discover these design errors as early as and efficient way. Simulation and tautology possible, and to correct them in a fast checking can be used for design verification. Their role is only to decide whether the design is correct or not. But when the existence of an error is detected, further mechanized help is needed to and the error correction. Though error diagnosis methods based on simulation are simple and fast, they are not considered accurate enough to be used for error correction. Symbolic methods based on Binary Decision Diagrams (BDDs) are accurate enough to be used both for diagnosis and correction, but they have limited applicability due to the memory explosion problem associated with BDDS. This work presents a simulation-based error correction procedure, which can efficiently overcome the limitations of a symbolic error correction method without sacrificing much accuracy.