Abstract
Advances in digital signal processors have prompted the development of various algorithms for use in all digital data receivers. This thesis discusses the implementation of a joint detection and symbol synchronization algorithm using two Texas Instruments TMS32OC30 (C30) Digital Signal Processors, one as a transmitter of digital data, and another as a sampled receiver used to implement the algorithm. It is shown that when using raised cosine pulses for transmission of symbols, and sampling of these symbols is at least 4 times above the Nyquist rate, the performance results using the TMS32OC30 Digital Signal Processor coincide with those theoretically derived. Furthermore, it is also shown that the timing estimate produced by the algorithm can be used to compensate for differing transmitter/receiver clock rates.
Van Slyke, Braddon Michael (1996). Implementation of a sampled receiver using TMS320C30 signal processor. Master's thesis, Texas A&M University. Available electronically from
https : / /hdl .handle .net /1969 .1 /ETD -TAMU -1996 -THESIS -V365.