Abstract
Parallel signature analysis with bidirectional multiple-input signature registers allows the data flow at internal test points on complex digital ICs to be observed. The test data are sampled and coded on-line at the rated internal speed of the ICs. The information about the data flow at the test points is gathered without putting an additional burden on the high speed data transfer between the ICs under test and the tester. Pseudorandom test patterns generated with linear feedback shift registers are successfully used for detecting single stuck-at faults in a combinational circuit. By adding a few gates to a bidirectional multiple-input signature register, a multifunctional logic subsystem is obtained, which combines the advantages of builtin test and scan path techniques. When this structure is applied to pipelined structure circuits, testing time is reduced by almost half that of previous schemes.
Lee, Jungran (1994). A modified version of BILBO for faster testing of pipeline structure circuits. Master's thesis, Texas A&M University. Available electronically from
https : / /hdl .handle .net /1969 .1 /ETD -TAMU -1994 -THESIS -L4784.