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dc.contributor.advisorStrader, Noel R.
dc.creatorHarden, James Curry
dc.date.accessioned2020-08-21T21:38:23Z
dc.date.available2020-08-21T21:38:23Z
dc.date.issued1985
dc.identifier.urihttps://hdl.handle.net/1969.1/DISSERTATIONS-404324
dc.descriptionTypescript (photocopy).en
dc.description.abstractBinary tree architectures are a good candidate for WSI because of the regular use of cells and local communication requirements. Unfortunately, a single critical failure can render an entire structure useless unless suitable redundant functionality is provided. The work described here examines different strategies for using redundancy to improve the anticipated yield for large area binary tree structures. A mathematical analysis of expected yield is used to optimize the redundant cell strategy. WSI yield loss is caused by gross defects (handling, misalignment, etc.) and by random defects (point defects and small area defects). Gross defects are probably fatal, while yield loss because of random defects may be repairable. A model treating these random defects is presented using the generalized negative binomial distribution after the work of Stapper. A building block approach is taken allowing redundancy at the subcell and cells levels. Three strategies for cellular sparing are considered. First, the node method is defined where each block contains enough redundancy to provide a sufficiently high yield for each node of the tree. Second, the level method is considered with each level of the tree containing spares for that level. Third, the leaf subset method allows level sparing within clusters of leaves and node sparing elsewhere. For each of these strategies, it is important to determine how the yield of cells at different levels of the tree affects the overall number of usable cells. This leads to the definition of architectural yield, a term that relates the yield of components of a given cellular structure to its overall functionality. For each strategy above, the architectural yield is defined in terms of block yield, 1-of-N for the node method and M-of-N for the level method. In each case, the assumption of building block independence is used to develop expressions of expected values of usable cells. A second expression is developed relating cell size, redundancy and wafer area. A general optimal solution for node redundancy and specific solutions for level redundancy are then found. These yield enhancement strategies are then applied to the cellular tree architecture of the Magó machine. First, the operation of the machine is examined to allow estimates of cell composition. Then, based on the these estimates, the yield enhancement methods are applied and evaluated.en
dc.format.extentxi, 180 leavesen
dc.format.mediumelectronicen
dc.format.mimetypeapplication/pdf
dc.language.isoeng
dc.rightsThis thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use.en
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subjectMajor electrical engineeringen
dc.subject.classification1985 Dissertation H259
dc.subject.lcshIntegrated circuitsen
dc.subject.lcshMathematical modelsen
dc.subject.lcshComputer architectureen
dc.subject.lcshMathematical modelsen
dc.titleA wafer scale cellular tree architectureen
dc.typeThesisen
thesis.degree.grantorTexas A&M Universityen
thesis.degree.nameDoctor of Philosophyen
thesis.degree.namePh. Den
dc.contributor.committeeMemberFischer, T. R.
dc.contributor.committeeMemberLively, W. M.
dc.contributor.committeeMemberRhyne, V. T.
dc.type.genredissertationsen
dc.type.materialtexten
dc.format.digitalOriginreformatted digitalen
dc.publisher.digitalTexas A&M University. Libraries
dc.identifier.oclc13244142


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