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Low density parity check decoder
(United States. Patent and Trademark Office, 2015-08-18)
A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R ...
Rank-modulation rewriting codes for flash memories
(United States. Patent and Trademark Office, 2015-07-21)
Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. ...