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dc.contributor.advisorPalermo, Samuel
dc.creatorYan, Peng
dc.date.accessioned2023-10-12T13:55:40Z
dc.date.available2023-10-12T13:55:40Z
dc.date.created2023-08
dc.date.issued2023-07-05
dc.date.submittedAugust 2023
dc.identifier.urihttps://hdl.handle.net/1969.1/199845
dc.description.abstractUltra wide-band optical channel’s insensitivity to frequency and communication distance makes it suitable to support ever-increasing data-rate, while electrical copper channel is no longer a solution. Optical transceiver based on micro-ring resonator is an effective approach bridging optical channel’s THz bandwidth and electrical circuit’s GHz running speed, but has increased design complexity. This dissertation presents three designs focusing on power-efficient short-reach optical communication up to hundreds of meters, including one wire-boned optical receiver and two 3D-integrated optical transceivers. TIA with a multi-stage amplifier is proposed to reduce optical receiver’s noise and improve its sensitivity, without extra power and silicon area. Clocking, transmitter and micro-ring resonant wavelength stabilization are also discussed to make a complete power-efficient optical transceiver. Combining all noise reduction techniques, the 12.5 Gb/s optical receiver fabricated in 28 nm CMOS technology achieves 0.11 pJ/bit power efficiency and -10.7 dBm OMA sensitivity at 10−12 BER with a 0.6 A/W wire-bonded PD. Power efficiency improves by 3.6X while normalized OMA sensitivity improves by 3.2 dB, compared to conventional TIA using a single-stage amplifier. Its minimal silicon area without on-chip inductors makes it suitable for high bandwidth-density applications. Further improvement is achieved in the 32-channel optical transceiver fabricated in 12 nm CMOS technology, with co-designed optical devices and 3D integration. Optical transmitter has 157 fJ/bit power efficiency at 18 Gb/s. The measured optical receiver power efficiency of 84.8 fJ/bit and -17.0 dBm OMA sensitivity at 25 Gb/s is the state-of-the-art result to our best knowledge. Normalized OMA sensitivity is second only to power-hungry design using DFE, with 18.75X better power efficiency. The 20-channel design has been taped-out in 22 nm CMOS technology, with simulated 179 fJ/bit overall power efficiency at 500 Gb/s aggregate data rate. 3D-integrated optical transceiver incorporates MOS-capacitor modulator transmitter with DVFS and multi-phase clock generated by DLL for less power. Electrostatic micro-ring resonant wavelength stabilization is included to eliminate high-power heater-based tuning.
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectoptical transceiver
dc.subjectCMOS
dc.subjectsilicon photonic
dc.subject3D-integration
dc.subjecthigh-speed serdes
dc.subjectequalization
dc.subjectlow power
dc.subjectlow noise
dc.subjecttransimpedance amplifier
dc.subjecttransimpedance limit
dc.titleDesign of Energy-Efficient Optical Transceivers
dc.typeThesis
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorTexas A&M University
thesis.degree.nameDoctor of Philosophy
thesis.degree.levelDoctoral
dc.contributor.committeeMemberGratz, Paul
dc.contributor.committeeMemberSilva-Martinez, Jose
dc.contributor.committeeMemberWalker, Duncan Henry M.
dc.type.materialtext
dc.date.updated2023-10-12T13:55:40Z
local.etdauthor.orcid0000-0002-7678-2606


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