Design of Wavelength Division Multiplexing Optical Interconnect Systems with Advanced Heterogeneous Integration

Abstract

The dissertation presents the design of silicon photonic (SiP) optical transceiver and co-packaged photonic integrated circuit (PIC) for energy-efficient multi-channel optical data communication. The dissertation demonstrates 3 designs in silicon photonic CMOS co-design platform. The first design is a 2.5D integrated forward-clock 8-channel The dissertation presents the design of silicon photonic (SiP) optical transceiver and co-packaged photonic integrated circuit (PIC) for energy-efficient multi-channel optical data communication. The dissertation demonstrates 3 designs in silicon photonic CMOS co-design platform. The first design is a 2.5D integrated forward-clock 8-channel Wavelength Division Multiplexing (WDM) optical transceiver with co-designed electrical transceiver and implemented in 12nm FinFET technology. The second design is a 3D-integrated 32-channel WDM optical transceiver in state-of-the-art Direct Bond Interconnect (DBI) packaging aimed at maximal optimization of energy efficiency and Optical Amplitude Modulation (OMA) Sensitivity, also in 12nm FinFET technology. The 2 transceiver chips are to address the continuous demand in bandwidth, transmission distance and energy efficiency from modern-day data communication emerged from the high-performance computing and data center application. The third implemented chip is a silicon photonic based monolithic polarization controller and tracking loop for optical interconnect. The chip design targets the issue of random Polarization Mode rotation commonly encounter in long distance fiber transmission due to unwanted mechanical stress and motion of fiber which leads to data corruption in optical data communication. In contrast to prior arts which are discrete control loop via PIC and FPGA, the proposed polarization tracking loop is implemented in silicon-photonic-CMOS monolithic 90nm Silicon-On-Insulator (SOI) process which integrates the Silicon-Germanium photonic devices, CMOS digital logic and analog circuitry onto a single chip, with the potential scalability of multiple polarization tracker channel on a single chip for multiple wavelength polarization stabilization for WDM optical inter-connect. Wavelength Division Multiplexing (WDM) optical transceiver with co-designed electrical transceiver and implemented in 12nm FinFET technology. The second design is a 3D-integrated 32-channel WDM optical transceiver in state-of-the-art Direct Bond Interconnect (DBI) packaging aimed at maximal optimization of energy efficiency and Optical Amplitude Modulation (OMA) Sensitivity, also in 12nm FinFET technology. The 2 transceiver chips are to address the continuous demand in bandwidth, transmission distance and energy efficiency from modern-day data communication emerged from the high-performance computing and data center application. The third implemented chip is a silicon photonic based monolithic polarization controller and tracking loop for optical interconnect. The chip design targets the issue of random Polarization Mode rotation commonly encounter in long distance fiber transmission due to unwanted mechanical stress and motion of fiber which leads to data corruption in optical data communication. In contrast to prior arts which are discrete control loop via PIC and FPGA, the proposed polarization tracking loop is implemented in silicon-photonic-CMOS monolithic 90nm Silicon-On-Insulator (SOI) process which integrates the Silicon-Germanium photonic devices, CMOS digital logic and analog circuitry onto a single chip, with the potential scalability of multiple polarization tracker channel on a single chip for multiple wavelength polarization stabilization for WDM optical interconnect.