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dc.contributor.advisorHoyos, Sebastian
dc.creatorGomez Diaz, Julian Camilo
dc.date.accessioned2023-05-26T18:01:23Z
dc.date.created2022-08
dc.date.issued2022-07-25
dc.date.submittedAugust 2022
dc.identifier.urihttps://hdl.handle.net/1969.1/197941
dc.description.abstractThe constant increase in global data generation generated by applications such as internet of things (IoT) and artificial intelligence (AI) calls for an improvement in the speeds at which data is transmitted across communication devices. This requires that wireless and wireline communication devices operate at a higher data rate. Denser and more spectral efficient modulations seem like a straightforward solution, but they pose distinct challenges to the design of these transceivers. The presence of multiple dynamic and strong interferers in the radio frequency (RF) spectrum creates a hostile environment for the receivers, which in the presence of mild nonlinearities will create intermodulation products and cause spectral regrowth that result in a significant reduction in their dynamic range that could potentially desensitize the receiver. As data rates increase in wireline communications, more systems adopt an ADC-based receiver architecture that provides a viable solution to implement more advanced equalization schemes in the DSP to overcome challenges inherent to typical electrical channels, such as high frequency-dependent loss and signal reflections. Nonetheless, these new architectures are still susceptible to sampling clock jitter that produces jitter-induced noise from sampling the signal and degrade the overall signal-to-noise ratio (SNR). Furthermore, nonlinearities in the analog front-end cause compression of the modulated signal that will pose a limit on the maximum modulation order that may be used. To help tackle the previously described obstacles in wireless and wireline communications. This dissertation presents a new digital linearization technique that uses a dual-path receiver to remove the third-order nonlinearity of a wireless receiver. Furthermore, a multicarrier architecture for high-speed wireline communications is introduced to overcome the sampling jitter problem. Finally, an alternative equalization method for wireline ADC-based receivers based on recurrent neural networks (RNNs). The RNN equalizer offers significant bit-error-rate improvement in the presence of analog front-end nonlinearities and a channel with a notch on its frequency response.
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectwireline communications
dc.subjectdigital linearization
dc.subjectmulticarrier front-end
dc.subjectjitter-robust
dc.subjectpam4
dc.subjectneural network equalizer
dc.titleMulti-Channel Receivers for Wireless and Wireline Communication Systems
dc.typeThesis
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorTexas A&M University
thesis.degree.nameDoctor of Philosophy
thesis.degree.levelDoctoral
dc.contributor.committeeMemberPalermo, Samuel
dc.contributor.committeeMemberSilva-Martinez, Jose
dc.contributor.committeeMemberXiong, Zixiang
dc.contributor.committeeMemberBhattacharya, Anirban
dc.type.materialtext
dc.date.updated2023-05-26T18:01:24Z
local.embargo.terms2024-08-01
local.embargo.lift2024-08-01
local.etdauthor.orcid0000-0002-8340-4953


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