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dc.creatorCisneros-Saldana, Jorge Ignacio D.
dc.creatorZhou, Yuqi
dc.creatorXie, Le
dc.date.accessioned2023-04-05T17:19:40Z
dc.date.available2023-04-05T17:19:40Z
dc.date.issued2018-12-23
dc.identifier.citationY. Zhou, J. Cisneros-Saldana and L. Xie, "False Analog Data Injection Attack Towards Topology Errors: Formulation and Feasibility Analysis," 2018 IEEE Power & Energy Society General Meeting (PESGM), 2018, pp. 1-5, doi: 10.1109/PESGM.2018.8586585.en_US
dc.identifier.urihttps://hdl.handle.net/1969.1/197531
dc.description.abstractIn this paper, we propose a class of false analog data injection attack that can misguide the system as if topology errors had occurred. By utilizing the measurement redundancy with respect to the state variables, the adversary who knows the system configuration is shown to be capable of computing the corresponding measurement value with the intentionally misguided topology. The attack is designed such that the state as well as residue distribution after state estimation will converge to those in the system with a topology error. It is shown that the attack can be launched even if the attacker is constrained to some specific meters. The attack is detrimental to the system since manipulation of analog data will lead to a forged digital topology status, and the state after the error is identified and modified will be significantly biased with the intended wrong topology. The feasibility of the proposed attack is demonstrated with an IEEE 14-bus system.en_US
dc.language.isoen_USen_US
dc.publisherIEEEen_US
dc.rightsAttribution-NonCommercial-ShareAlike 4.0 International*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/*
dc.subjectTopologyen_US
dc.subjectJacobian matricesen_US
dc.subjectState estimationen_US
dc.subjectMeasurement uncertaintyen_US
dc.subjectTime measurementen_US
dc.subjectReal-time systemsen_US
dc.subjectMathematical modelen_US
dc.subjectOptimizationen_US
dc.subjectpower engineering computingen_US
dc.subjectpower system measurementen_US
dc.subjectpower system securityen_US
dc.subjectpower systemen_US
dc.subjectFalse data injection attacksen_US
dc.subjecttopology errorsen_US
dc.titleFalse Analog Data Injection Attack Towards Topology Errors: Formulation and Feasibility Analysisen_US
dc.typeArticleen_US
local.departmentElectrical and Computer Engineeringen_US
dc.identifier.doi10.1109/PESGM.2018.8586585


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Attribution-NonCommercial-ShareAlike 4.0 International
Except where otherwise noted, this item's license is described as Attribution-NonCommercial-ShareAlike 4.0 International