Ultra-low Quiescent Current, Fast Settling Capacitor-less Low Drop-out Regulator

Abstract

A 220 nA ultra-low quiescent bias current capacitor-less low drop-out (CL-LDO) regulator with improved single transistor control (STC) and adaptive transformation is presented in this thesis. The STC-LDO handles light load currents (0-20 uA), whereas the adaptive transformation to 2-stage structure handles medium load currents (20uA - 5 mA), and subsequent transformation

of the LDO to a 3-stage structure handles high load currents (5 mA- 100 mA). The LDO provides a 0.9 V output voltage and can regulate up to a maximum of 100mA from a power supply of 1.1 V. Complete load current range (0 - 100 mA) stability is achieved at a maximum load parasitic capacitance of 100 pF. For a rising load current transient (0 - 100 mA), the LDO achieves a recovery time of 101 ns, and an undershoot of 292 mV is observed at the output. For falling load

current transient (100 mA - 0), the LDO achieves a recovery time of 354 ns, and an overshoot of 56 mV is observed at the output. The structural transformation proposed in this thesis significantly improves the recovery time of CL-LDO, enabling fast transient response even under ultra-low quiescent bias current of 220 nA.