Algorithms and Architectures for Some Problems in Multibeam Electron Beam Lithography and SEM Metrology

Abstract

The original Moore’s law has slowed down. It has become unfeasible to double the number of transistor per unit area on integrated circuits every 18 to 24 months. However, the continuous need for computation power is driving the semiconductor industry towards innovative solutions to reduce integrated circuit sizes. Multibeam mask writers and accurate scanning electron microscopy (SEM) metrology are two such innovative solutions. Multibeam mask writers enable next-generation integrated circuit fabrication technologies like extreme ultraviolet lithography (EUV). However, the digital communication capacity constraints limit the widespread adoption of multibeam mask writers. In the first part of this dissertation thesis, we present a study of multibeam systems and offer improvements to increase their communication capacity. We propose improvements to the communication datapath architecture, compression algorithms, and the decompression architecture to improve the communication capacity. In the second part of this thesis, we attempt to improve scanning electron microscopy (SEM) metrology using deep learning techniques. Poisson noise, edge effects, and instrument errors frequently corrupt SEM images. Significant improvements in SEM metrology will enable next-generation lithography. To attain metrology improvements, we first create simulated datasets of SEM images and then train multiple deep convolution neural networks on these datasets. Our deep convolution neural networks exhibit superior performance in comparison with previous techniques. Particularly, we demonstrate improvements to nanostructure roughness measurements like line edge roughness (LER), which determine the quality of fabrication processes. Overall, this thesis work attempts to improve the semiconductor manufacturing process using architectural and algorithmic improvements.