| dc.description.abstract | As the Moore’s Law continues to drive IC technology, power delivery has become one
of the most difficult design challenges. Two of the major components in power delivery are
DC-DC converters and power distribution networks, both of which are time-consuming to
simulate and characterize using traditional approaches. In this dissertation, we propose a
complete set of solutions to efficiently analyze DC-DC converters and power distribution
networks by finding a perfect balance between efficiency and accuracy.
To tackle the problem, we first present a novel envelope following method based on
a numerically robust time-delayed phase condition to track the envelopes of circuit states
under a varying switching frequency. By adopting three fast simulation techniques, our
proposed method achieves higher speedup without comprising the accuracy of the results.
The robustness and efficiency of the proposed method are demonstrated using several DCDC
converter and oscillator circuits modeled using the industrial standard BSIM4 transistor
models. A significant runtime speedup of up to 30X with respect to the conventional
transient analysis is achieved for several DC-DC converters with strong nonlinear switching
characteristics.
We then take another approach, average modeling, to enhance the efficiency of analyzing
DC-DC converters. We proposed a multi-harmonic model that not only predicts the
DC response but also captures the harmonics of arbitrary degrees. The proposed full-order
model retains the inductor current as a state variable and accurately captures the circuit
dynamics even in the transient state. Furthermore, by continuously monitoring state variables,
our model seamlessly transitions between continuous conduction mode and discontinuous
conduction mode. The proposed model, when tested with a system decoupling
technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%.
Based on the multi-harmonic averaged model, we further developed the small-signal
model that provides a complete characterization of both DC averages and higher-order
harmonic responses. The proposed model captures important high-frequency overshoots
and undershoots of the converter response, which are otherwise unaccounted for by the
existing techniques. In two converter examples, the proposed model corrects the misleading
results of the existing models by providing the truthful characterization of the overall
converter AC response and offers important guidance for converter design and closed-loop
control.
To address the problem of time-consuming simulation of power distribution networks,
we present a partition-based iterative method by integrating block-Jacobi method with
support graph method. The former enjoys the ease of parallelization, however, lacks a
direct control of the numerical properties of the produced partitions. In contrast, the latter
operates on the maximum spanning tree of the circuit graph, which is optimized for
fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our
proposed method, the circuit partitioning is guided by the maximum spanning tree of the
underlying circuit graph, offering essential guidance for achieving fast convergence. The
resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from
support graph theory while lending itself to straightforward parallelization as a partitionbased
method. The experimental results on IBM power grid suite and synthetic power grid
benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X
over a state-of-the-art direct solver. | en |
