Hardware Solutions for Next Generation of Telecommunication Systems Physical Layer Implementation

Abstract

In telecommunication systems the goal is to increase the throughput of data communication. Multiple input and multiple output antennas (MIMO) can be used to increase the SNR of the system and as the result increase the throughput via increasing the quality of the service (QoS) or it can be used to increase the speed of transmitted data and the throughput as the result. This trade-off can be used as advantage when dealing with a system design to better utilize hardware/software resources as well as to optimally exploit the environmental factors associated with communication medium. We studied the iterative detection and decoding of the received signals. In this case the received signals are being detected and decoded multiple times which results in higher complexity, and QoS. Considering the original complexity of the MIMO detectors hardware implementation of this method is challenging. To reduce the complexity while expecting performance gain over traditional receivers like Minimum Mean Square of Errors (MMSE) and Zero Forcing (ZF) detectors we had to look at more recent detectors and accept some performance loss. These are detectors with close to ML performance like Kbest or amended versions or linear detectors like the LR aided (lattice reduction) MMSE, or LORD (layered orthogonal lattice detector) detector. Following this approach we considered Integer Forcing (IF) detectors. The IF detectors are categorized as linear detectors; however, there is a search involved in calculating and generating the inverse of the channel matrix that searches for inverse of any full rank integer combination of transmitted data with minimum effect on channel noise. We introduce an algorithm that is able to provide LLRs (soft values) for the detected signal. We show that these type of detectors can reduce the gap between Zero Forcing (ZF) linear detector and maximum likelihood (ML) detector to 48% with only 2.96× more complexity while ML detector is 28.86× more complex.

We have implemented an IF processor to evaluate the hardware performance of this detector. To accomplish this task we have improved the existing designs for singular value decomposer (SYD) and advanced the decomposer to achieve a high performance IF detector. We finally present a proof of consent for asynchronous implementation of MIMO satellite communication.