Improved Carrier Blocking Properties of Interface in Cryogenic Particle Detectors

Abstract

Sensitivity of cryogenic particle detectors suffers from various loss and leakage mechanisms which influence carrier transport in the bulk and interface layers of the detectors. Suppressing- and wherever possible, eliminating- such loss mechanisms is imperative to lowering the noise floor of detectors to enable detection of characteristically weak energy signatures of exotic particle interactions. This work investigates one such loss mechanism– tunneling driven carrier leakage through the interface stack in particle detectors– and focuses on remodeling the stack composition and associated fabrication processes to mitigate such leakage. Measures to improve carrier blocking properties in the interface are explored with an aim to lower the steady state leakage and thereby improve detector sensitivity. This study aims at identifying and implementing measures to combat carrier tunneling through the interface. As part of such efforts, novel distributions of 40nm interface-thickness budget of SiOv2 and poly-crystalline Silicon have been tested for their capabilities of suppressing tunneling mechanisms. This comes as a modification to the previously proposed 20nm+20nm configuration of SiO2+pc-Si which, while being a significant improvement over the traditionally used amorphous-Si interface, has still been shown to be inadequate in blocking carriers. Interface processing modifications aimed at suppressing trap-mediated tunneling mechanisms by way of annealing the devices following SiO2 deposition have been explored. Rapid thermal processing at 600 degrees C has been found to decrease the leakage by over an order of magnitude at 22K, which while being promising, still leaves room for improvement. CO2 laser annealing has been identified as an option for selectively annealing only the SiO2 film at high temperatures (~1500 degrees C) thereby leaving the substrate purity uncompromised. Laser annealing has been performed at different power levels and scan speeds to identify the highest usable temperature that does not result in pinhole defects in the film. Room temperature and cryogenic characterization has been performed on these devices to evaluate their carrier blocking properties. At 20K, laser annealed devices have been found to exhibit leakage three orders of magnitude lower than as deposited samples and two orders lower than rapid thermal processed devices.