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dc.contributor.advisorMahapatra, Rabi
dc.creatorDang, Dharanidhar
dc.date.accessioned2019-01-23T20:55:10Z
dc.date.available2020-12-01T07:32:41Z
dc.date.created2018-12
dc.date.issued2019-01-09
dc.date.submittedDecember 2018
dc.identifier.urihttps://hdl.handle.net/1969.1/174537
dc.description.abstractWith silicon technology reaching its physical limit, conventional computing systems are incapable of offering ever-increasing performance requirement with limited power budget. This has propelled semiconductor community to seek for new computing paradigms that can offer high energy-efficiency. Silicon photonics with its ultra-low power characteristics, inherent parallelism, and large multiplexing capability, is one such promising paradigm. The goal of this research is to utilize silicon photonics to design energy-efficient exascale computing architectures. This study is established through research in a number of directions. First, we propose a non-blocking, 5×5, low-cost on-chip photonic router. It incorporates mode-division-multiplexing in addition to wavelength-division-multiplexing and time-division-multiplexing for high-throughput. It is a first of its kind to the best of our knowledge. We use this router to design high-performance 2D and 3D mesh photonic network-on-chip (PNoC). Further, we introduce a novel laser-multiplexing scheme to further enhance the energy-efficiency of our PNoC designs. Components in a photonic system are highly susceptible to thermal variations. We propose IHDTM, a cross-layer dynamic thermal management technique which is a combination of device-level optimization and system-level thread migration. After demonstrating a highly reliable energy-efficient photonic system, we intend to devise a high-performance photonic architecture for exascale data analytic applications. Multicast data dissemination is a major performance bottleneck for data analytic applications in cluster computing, as terabytes of data need to be distributed frequently from a single data source to hundreds of computing nodes. To overcome this bottleneck, we propose BiGNoC, a manycore chip platform with a novel application-specific photonic on-chip network architecture. Finally, we intend to utilize the exascale parallelism and ultrafast characteristics of silicon photonics to extend the state of the art in deep learning accelerator architectures. Training a deep learning network involves expensive computation overheads. As a result, most of the accelerators use pre-trained weights and focus only on improving the design of inference phase. We propose a novel photonic-based backpropagation accelerator for high performance deep learning training. In addition, we present a design for convolutional neural network, BPLight-CNN, which incorporates the novel photonic backpropagation accelerator. BPLight-CNN is a first-of-its-kind photonic and memristor-based CNN architecture for end-to-end training and prediction.en
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectPhotonicsen
dc.subjectNetwork-on-Chipen
dc.subjectDeep learningen
dc.titleEnergy-Efficient Photonic Architectures for Large-Scale Data Analyticsen
dc.typeThesisen
thesis.degree.departmentComputer Science and Engineeringen
thesis.degree.disciplineComputer Engineeringen
thesis.degree.grantorTexas A & M Universityen
thesis.degree.nameDoctor of Philosophyen
thesis.degree.levelDoctoralen
dc.contributor.committeeMemberWalker, Duncan
dc.contributor.committeeMemberKim, Eun Jung
dc.contributor.committeeMemberPalermo, Samuel
dc.type.materialtexten
dc.date.updated2019-01-23T20:55:11Z
local.embargo.terms2020-12-01
local.etdauthor.orcid0000-0002-3802-381X


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