| dc.description.abstract | A battery-powered system has widely expanded its applications to implantable medical devices
(IMDs) and portable electronic devices. Since portable devices or IMDs operate in the
energy-constrained environment, their low-power operations in combination with efficiently sourcing
energy to them are key problems to extend device life. This research proposes novel circuit
techniques for two essential functions of a power receiving unit (PRU) in the energy-constrained
environment, which are power management and signal processing.
The first part of this dissertation discusses power management integrated circuits for a PRU.
From a power management perspective, the most critical two circuit blocks are a front-end rectifier
and a battery charger. The front-end CMOS active rectifier converts transmitted AC power into
DC power. High power conversion efficiency (PCE) is required to reduce power loss during the
power transfer, and high voltage conversion ratio (VCR) is required for the rectifier to enable low-voltage
operations. The proposed 13.56-MHz CMOS active rectifier presents low-power circuit
techniques for comparators and controllers to reduce increasing power loss of an active diode with
offset/delay calibration. It is implemented with 5-V devices of a 0.35 µm CMOS process to support
high voltage. A peak PCE of 89.0%, a peak VCR of 90.1%, and a maximum output power of 126.7
mW are measured for 200Ω loading.
The linear battery charger stores the converted DC power into a battery. Since even small
power saving can be enough to run the low-power PRU, a battery charger with low IvQ is desirable.
The presented battery charger is based on a single amplifier for regulation and the charging
phase transition from the constant-current (CC) phase to the constant-voltage (CV) phase. The
proposed unified amplifier is based on stacked differential pairs which share the bias current. Its
current-steering property removes multiple amplifiers for regulation and the CC-CV transition, and
achieves high unity-gain loop bandwidth for fast regulation. The charger with the maximum charging
current of 25 mA is implemented in 0.35 µm CMOS. A peak charger efficiency of 94% and
average charger efficiency of 88% are achieved with an 80-mAh Li-ion polymer battery.
The second part of this dissertation focuses on analog-to-digital converters (ADCs). From a
signal processing perspective, an ADC is one of the most important circuit blocks in the PRU.
Hence, an energy-efficient ADC is essential in the energy-constrained environment. A pipelined successive
approximation register (SAR) ADC has good energy efficiency in a design space of
moderate-to-high speeds and resolutions. Process-Voltage-Temperature variations of a dynamic
amplifier in the pipelined-SAR ADC is a key design issue. This research presents two dynamic
amplifier architectures for temperature compensation. One is based on a voltage-to-time converter
(VTC) and a time-to-voltage converter (TVC), and the other is based on a temperature-dependent
common-mode detector. The former amplifier is adopted in a 13-bit 10-50 MS/s subranging
pipelined-SAR ADC fabricated in 0.13-µm CMOS. The ADC can operate under the power supply
voltage of 0.8-1.2 V. Figure-of-Merits (FoMs) of 4-11.3 fJ/conversion-step are achieved. The latter
amplifier is also implemented in 0.13-µm CMOS, consuming 0.11 mW at 50 MS/s. Its measured
gain variation is 2.1% across the temperature range of -20°C to 85 °C. | en |
