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dc.creatorBarba, Diego J
dc.date.accessioned2018-07-24T15:31:49Z
dc.date.available2018-07-24T15:31:49Z
dc.date.created2016-05
dc.date.issued2015-10-02
dc.date.submittedMay 2016
dc.identifier.urihttps://hdl.handle.net/1969.1/167868
dc.description.abstractEfficiency has been one of the main topics in the VLSI industry as technology grows and analog devices shrink in size. The past years, this parameter has become extremely crucial as we look for ways to extend the battery life of our devices. A Class D Audio Amplifier (CDA) is mostly known for its ability to provide power to a load or speaker in an efficient manner. However, due to losses in the power stage, it can never reach 100% efficiency. Different approaches to increase the efficiency have been developed, but all of them target a small range of input power. After analyzing the dominant losses of the system, we were able to identify that splitting the transistor level power stage into small stages can dramatically increase the efficiency for small input power and maintain the same efficiency for high input power. This improvement in efficiency for a wider power range was accomplished without affecting the overall area of the system. Developing systems that perform better without altering the area that it occupies in the chip is extremely important as we tend to reduce the size of our analog and digital devices.en
dc.format.mimetypeapplication/pdf
dc.subjecten
dc.titleDesign of a Class D Audio Amplifier with Optimized Efficiency for Low Input Poweren
dc.typeThesisen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorUndergraduate Research Scholars Programen
dc.contributor.committeeMemberSanchez-Sinencio, Edgar
dc.type.materialtexten
dc.date.updated2018-07-24T15:31:49Z


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