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dc.creatorZaman, Arshad Kamruz
dc.date.accessioned2018-05-23T15:33:53Z
dc.date.available2018-05-23T15:33:53Z
dc.date.created2019-05
dc.date.submittedMay 2019
dc.identifier.urihttp://hdl.handle.net/1969.1/166485
dc.description.abstractChannel impairments in high data rates make Analog-to-digital (ADC) serial link a very attractive choice in terms of bandwidth efficient modulation; however, power limitation of these receivers make the ADC front-end design rather challenging [3]. By replacing traditional symbol by-symbol digital equalizer with a maximum likelihood sequence estimator (MLSE) receiver, in ADC serial link, we can produce a more optimal equalizing architecture in terms of noise, and simplify the complexity of the design in the analog front-end [7]. MLSE architecture is implemented using the Viterbi algorithm, in Matlab, and the parameters for the analog front-end circuits were defined by plotting the bit error rate (BER) as a function of different SNRs. Comparing the BER between the traditionally used MMSE equalizer and MLSE receiver BER was found to be lower for same SNR. Although using the Viterbi algorithm to determine the original signal sequence may make MLSE computationally challenging, the simplicity of analog front-end and lower BER makes this an effective choice for high bandwidth transmission in a digital-heavy receiver.en
dc.format.mimetypeapplication/pdf
dc.subjectMaximum Likelihood Sequence Equalizing Architectureen
dc.subjectMLSEen
dc.subjectViterbi Algorithmen
dc.subjectADCen
dc.subjectSerial Linken
dc.subjectInter-Symbol Interferenceen
dc.subjectISIen
dc.titleA Maximum Likelihood Sequence Equalizing Architecture Using Viterbi Algorithm for ADC-Based Serial Linken
dc.typeThesisen
thesis.degree.departmentElectrical & Computer Engineeringen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorUndergraduate Research Scholars Programen
thesis.degree.nameBSen
thesis.degree.levelUndergraduateen
dc.contributor.committeeMemberPalermo, Samuel
dc.type.materialtexten
dc.date.updated2018-05-23T15:33:54Z


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