| dc.description.abstract | Continuous-time analog filters are important blocks for analog-to-digital converter (ADC) and IF filtering in receivers. Nowadays, cost and power consumption are major concerns for portable devices, so a low-power high performance solution is a great need.
The thesis proposes a novel continuous-time filter topology and implements a 10MHz low-pass filter achieving a signal-to-noise-and-distortion ratio (SNDR) of 70dB with only 1.3mW power consumption. This novel filter topology has an inherent low-noise property which alleviates the trade-off between noise and power consumption. The design considerations including frequency response, stability, noise, and distortion are presented. Since the performance of filters mainly depends on the amplifier, an AC-coupled class-AB OTA is proposed for the novel filter to improve the power efficiency and out-of-band linearity. The filter is implemented in IBM 130nm process and highly linear voltage-to-current converter and output buffer are also designed for testing. Compared with Tow-Thomas Biquad counterpart, the proposed filter saves about 40% power consumption for the same filter transfer function. Therefore, this proposed novel filter is a competitive filter topology for low-noise and low-power applications. | en |
