| dc.description.abstract | Today’s wireless applications have demanded low-power, high-speed, and high-resolution analog-to-digital converters (ADCs) for the reductions in cost, component count, and product size. Continuous-time (CT) Sigma-Delta ADCs are well suited for satisfying the demands due to their better power efficiency, inherent anti-aliasing filtering, and high-speed properties. This thesis provides overviews of fundamentals with the focus on CT Sigma-Delta ADCs and investigates the loop filter design methodologies for CT low-pass sigma-delta (ADCs). The existing design methodologies for continuous-time low-pass sigma-delta analog-to-digital converters (ADCs) are presented. The drawbacks of the current methodology to obtain CT (s-domain) transfer function for a CT Sigma-Delta modulator are investigated. An optimized loop filter design methodology of CT low-pass Sigma-Delta ADCs using Matlab software is introduced in this work. A feed-forward topology is selected for the implementation of the CT Sigma-delta modulator. Two Matlab functions are presented. First function, named ctlooft, synthesizes a loop filter for a CT Sigma-Delta modulator, and the other, called ffcoeff, calculates the parameter coefficients for feed-forward implementation of CT modulator. | en |
