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dc.contributor.advisorShi, Weiping
dc.creatorLi, Zhixing
dc.date.accessioned2015-04-28T15:39:23Z
dc.date.available2016-12-01T06:36:04Z
dc.date.created2014-12
dc.date.issued2014-12-15
dc.date.submittedDecember 2014
dc.identifier.urihttps://hdl.handle.net/1969.1/154203
dc.description.abstractWith the scale of interconnect number grows to billions, parasitic capacitance extraction speed is an important issue for fast turn-around time for designers. In this thesis, we propose to build a regression model for the input interconnect geometry to predict the parasitic capacitance based on machine learning. A simplification algorithm is proposed to reduce the number of conductors for quicker and easier regression modeling and the regression models can improve by machine learning technique. Experimental results show that the proposed method is significantly faster than existing method and provides satisfactory accuracy.en
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectMachine learningen
dc.subjectfast and accurate extractionen
dc.titleMachine Learning Applied in 2D Parasitic Extractionen
dc.typeThesisen
thesis.degree.departmentElectrical and Computer Engineeringen
thesis.degree.disciplineComputer Engineeringen
thesis.degree.grantorTexas A & M Universityen
thesis.degree.nameMaster of Scienceen
thesis.degree.levelMastersen
dc.contributor.committeeMemberLi, Peng
dc.contributor.committeeMemberJiang, Anxiao
dc.type.materialtexten
dc.date.updated2015-04-28T15:39:23Z
local.embargo.terms2016-12-01
local.etdauthor.orcid0000-0002-2880-2350


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