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dc.contributor.advisorSanchez-Sinencio, Edgar
dc.creatorTorres, Joselyn
dc.date.accessioned2014-05-13T17:19:28Z
dc.date.available2015-12-01T06:31:10Z
dc.date.created2013-12
dc.date.issued2013-12-03
dc.date.submittedDecember 2013
dc.identifier.urihttps://hdl.handle.net/1969.1/151705
dc.description.abstractHigh-performance DC-DC voltage converters and high-efficient class-D audio amplifiers are required to extend battery life and reduce cost in portable electronics. This dissertation focuses on new system architectures and design techniques to reduce area and minimize quiescent power while achieving high performance. Experimental results from prototype circuits to verify theory are shown. Firstly, basics on low drop-out (LDO) voltage regulators are provided. Demand for system-on-chip solutions has increased the interest in LDO voltage regulators that do not require a bulky off-chip capacitor to achieve stability, also called capacitor- less LDO (CL-LDO) regulators. Several architectures have been proposed; however, comparing these reported architectures proves difficult, as each has a distinct process technology and specifications. This dissertation compares CL-LDOs in a unified manner. Five CL-LDO regulator topologies were designed, fabricated, and tested under common design conditions. Secondly, fundamentals on DC-DC buck converters are presented and area reduction techniques for the external output filter, power stage, and compensator are proposed. A fully integrated buck converter using standard CMOS technology is presented. The external output filter has been fully-integrated by increasing the switching frequency up to 45 MHz. Moreover, a monolithic single-input dual-output buck converter is proposed. This architecture implements only three switches instead of the four switches used in conventional solutions, thus potentially reducing area in the power stage through proper design of the power switches. Lastly, a monolithic PWM voltage mode buck converter with compact Type-III compensation is proposed. This compensation scheme employs a combination of Gm-RC and Active-RC techniques to reduce the area of the compensator, while maintaining low quiescent power consumption and fast transient response. The proposed compensator reduces area by more than 45% when compared to an equivalent conventional Type-III compensator. Finally, basics on class-D audio amplifiers are presented and a clock-free current controlled class-D audio amplifier using integral sliding mode control is proposed. The proposed amplifier achieves up to 82 dB of power supply rejection ratio and a total harmonic distortion plus noise as low as 0.02%. The IC prototype’s controller consumes 30% less power than those featured in recently published works.en
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectDC-DC convertersen
dc.subjectClass-D audio amplifiersen
dc.subjectLDO voltage regulatoren
dc.subjectBuck converteren
dc.titleLow Power DC-DC Converters and a Low Quiescent Power High PSRR Class-D Audio Amplifieren
dc.typeThesisen
thesis.degree.departmentElectrical and Computer Engineeringen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorTexas A & M Universityen
thesis.degree.nameDoctor of Philosophyen
thesis.degree.levelDoctoralen
dc.contributor.committeeMemberSilva-Martinez, Jose
dc.contributor.committeeMemberEnjeti, Prasad
dc.contributor.committeeMemberMalave, Cesar
dc.type.materialtexten
dc.date.updated2014-05-13T17:19:28Z
local.embargo.terms2015-12-01


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