Browsing by Author "Ye, Xiaoji"

Now showing items 1-2 of 2

    • Fast high-order variation-aware IC interconnect analysis 
      Ye, Xiaoji (2009-05-15)
      Interconnects constitute a dominant source of circuit delay for modern chip designs. The variations of critical dimensions in modern VLSI technologies lead to variability in interconnect performance that must be fully ...
    • Parallel VLSI Circuit Analysis and Optimization 
      Ye, Xiaoji (2012-02-14)
      The prevalence of multi-core processors in recent years has introduced new opportunities and challenges to Electronic Design Automation (EDA) research and development. In this dissertation, a few parallel Very Large Scale ...