dc.creator | Gunnam, Kiran Kumar | |
dc.creator | Choi, Gwan S. | |
dc.date.accessioned | 2021-06-02T22:01:57Z | |
dc.date.available | 2021-06-02T22:01:57Z | |
dc.date.issued | 2021-03-16T00:00:00Z | |
dc.identifier.uri | https://hdl.handle.net/1969.1/193340 | |
dc.description.abstract | A method and system for decoding low density parity check ("LDPC") codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message. | en |
dc.language | EN | |
dc.publisher | United States. Patent and Trademark Office | |
dc.rights | Public Domain (No copyright - United States) | en |
dc.rights.uri | http://rightsstatements.org/vocab/NoC-US/1.0/ | |
dc.title | Low density parity check decoder | en |
dc.type | Utility patent | en |
dc.format.digitalOrigin | reformatted digital | en |
dc.description.country | US | |
dc.contributor.assignee | Texas A&M University System | |
dc.identifier.patentapplicationnumber | 15/373822 | |
dc.date.filed | 2016-12-09T00:00:00Z | |
dc.publisher.digital | Texas A&M University. Libraries | |
dc.subject.cpcprimary | H03M 13/616 | |
dc.subject.cpcprimary | H03M 13/116 | |
dc.subject.cpcprimary | H03M 13/1105 | |
dc.subject.cpcprimary | H03M 13/1128 | |
dc.subject.cpcprimary | H03M 13/1177 | |
dc.subject.cpcprimary | H03M 13/13 | |