Low density parity check decoder
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A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message memory stores a Q message until an R message is generated by a CNU, the Q message and the R message are combined to provide a P message. The cyclic shifter shifts the P message.
Gunnam, Kiran Kumar; Choi, Gwan S. (2018). Low density parity check decoder. United States. Patent and Trademark Office; Texas A&M University. Libraries. Available electronically from