False Analog Data Injection Attack Towards Topology Errors: Formulation and Feasibility Analysis
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Date
2018-12-23
Journal Title
Journal ISSN
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Publisher
IEEE
Abstract
In this paper, we propose a class of false analog data injection attack that can misguide the system as if topology errors had occurred. By utilizing the measurement redundancy with respect to the state variables, the adversary who knows the system configuration is shown to be capable of computing the corresponding measurement value with the intentionally misguided topology. The attack is designed such that the state as well as residue distribution after state estimation will converge to those in the system with a topology error. It is shown that the attack can be launched even if the attacker is constrained to some specific meters. The attack is detrimental to the system since manipulation of analog data will lead to a forged digital topology status, and the state after the error is identified and modified will be significantly biased with the intended wrong topology. The feasibility of the proposed attack is demonstrated with an IEEE 14-bus system.
Description
Keywords
Topology, Jacobian matrices, State estimation, Measurement uncertainty, Time measurement, Real-time systems, Mathematical model, Optimization, power engineering computing, power system measurement, power system security, power system, False data injection attacks, topology errors
Citation
Y. Zhou, J. Cisneros-Saldana and L. Xie, "False Analog Data Injection Attack Towards Topology Errors: Formulation and Feasibility Analysis," 2018 IEEE Power & Energy Society General Meeting (PESGM), 2018, pp. 1-5, doi: 10.1109/PESGM.2018.8586585.