Abstract
The aim of this research is to design a high performance, high data rate, low cost wireless communications system for use in a typical outdoor environment. The use of Low-Density Parity-check (LDPC) codes as the forward error correction scheme along with multi-carrier Code Division Multiple Access (CDMA) system is proposed and the performance of the proposed scheme is studied under the effect of frequency selective Rayleigh fading. The prospect of using a general purpose fixed-point Digital Signal Processor (DSP) as an alternative to Application Specific Integrated Circuit (ASIC) for decoding LDPC codes is examined. Parallel architecture of Texas Instrument's fixed- point DSP TMS320C6200® is exploited to get the maximum possible data rate. Various decoding algorithms for LDPC codes are implemented and complexity v/s bit error rate (BER) trade off is studied. The goal is to evaluate LDPC codes as a suitable candidate for the forward error correction in the next generation wireless systems and determine the application of axed-point DSP as a possible option for low cost and flexible decoder.
Bhatt, Tejas Maheshbhai (2000). Design and implementation of a high data rate wireless system using Low-Density Parity-Check codes. Master's thesis, Texas A&M University. Available electronically from
https : / /hdl .handle .net /1969 .1 /ETD -TAMU -2000 -THESIS -B475.