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A VLSI implementation of an IO processor
dc.contributor.advisor | Strader, N. R. | |
dc.creator | White, Steven Wayne | |
dc.date.accessioned | 2020-01-08T17:22:27Z | |
dc.date.available | 2020-01-08T17:22:27Z | |
dc.date.created | 1982 | |
dc.date.issued | 1982 | |
dc.identifier.uri | https://hdl.handle.net/1969.1/DISSERTATIONS-147529 | |
dc.description | Includes bibliographical references (leaves 127-128) | en |
dc.description.abstract | At the present time substantial software, memory, and CPU time are required to bridge the semantic gap between high-level language output statements and I/O device capabilities. Because of this gap and in response to the rapidly expanding capability of VLSI microelectronic circuits, an I/O processor was proposed to off-load the inherent conversion and formatting task from the host computer. The research reported here investigated the feasibility, the architectural requirements, and the implementation effects of a regular design methodology for an I/O processor. A major contribution of this research is demonstration of the feasibility of creating a VLSI peripheral processing unit to off-load the I/O task. No published results are available concerning a general solution to off-load the formatting function from a host processor. The results of this research provide a basis for VLSI design and implementation of special-purpose processors. The development of a design methodology may prove to be the major accomplishment of this research, in that the utility of this VLSI-related design process appears to go beyond its use in designing the I/O processor. The proposed methodology calls for: (1) architectural analysis to allow intelligent design of subsystems, (2) minimization of the number of interconnections, (3) emphasis on the use of regular structures to decrease design time and costs, (4) development of a floor plan for the integrated circuit, (5) modular fabrication and testing of the subsystems. Finally, this research used the I/O processor to illustrate a design process for special-purpose processors. It was demonstrated that an I/O processor, dedicated to the conversion and formatting task, could be feasibly realized as a custom VLSI component. It is likely that other similar processing tasks could also be efficiently performed by a special-purpose VLSI processor. | en |
dc.format.extent | xi, 156 leaves : illustrations | en |
dc.format.medium | electronic | en |
dc.format.mimetype | application/pdf | |
dc.language.iso | eng | |
dc.rights | This thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use. | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | |
dc.subject | Electrical Engineering | en |
dc.subject.classification | 1984 Dissertation H233 | |
dc.subject.lcsh | Microprocessors | en |
dc.subject.lcsh | Microcomputers--Design and construction | en |
dc.subject.lcsh | Microprogramming | en |
dc.subject.lcsh | Electrical Engineering | en |
dc.title | A VLSI implementation of an IO processor | en |
dc.type | Thesis | en |
thesis.degree.grantor | Texas A&M University | en |
thesis.degree.name | Doctor of Philosophy | en |
thesis.degree.level | Doctoral | en |
thesis.degree.level | Doctorial | en |
dc.contributor.committeeMember | Allen, P. E. | |
dc.contributor.committeeMember | Childs, S. B. | |
dc.contributor.committeeMember | Rhyne, V. T. | |
dc.type.genre | dissertations | en |
dc.type.material | text | en |
dc.format.digitalOrigin | reformatted digital | en |
dc.publisher.digital | Texas A&M University. Libraries |
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