Information Processing Techniques, Hardware Design and Applications
Abstract
We are living in an information age - information is collected, communicated and computed to improve the society and people’s life. This dissertation study is focused on several different aspects of information processing, including error correction in its communication, its application and hardware platform design.
Information systems in automobiles are built upon certain protocols and highly emphasize safety. A variety of information is transmitted inside the vehicle communication system when driving a car and many messages are critical for the vehicle safety. Error handling and real-time are thus two fundamental requirements for in-vehicle network communication. Traditionally, error detection code such as CRC (Cyclic Redundancy Check) is employed and a message is
retransmitted if any error is detected. However, message retransmission can conflict with real-time constraints due to extra communication delay and uncertain waiting time. Conventional error correction code can avoid message retransmission, but entails long decoding time or expensive hardware cost. In some recent in-vehicle network protocols, such as FlexRay and Time-Triggered Ethernet, redundant communication channels are supported. We propose a fast yet lightweight error correction
scheme that exploits this redundancy, called DUCER (DUal Crc Error coRrection), such that errors can be corrected with low cost while real-time constraints are satisfied. Smart and precision irrigation is in great demand as freshwater becomes increasingly scarce.
Information accuracy is critical to the successful operation of a smart irrigation system. The smart irrigation system in this work consists of a positioning system, a power system and a control system. In its positioning system, Global Positioning System (GPS) is used to track real-time location of the irrigation machine. However, GPS errors are usually non-negligible, which can mislead control system and then waste of water. We developed several information processing techniques to reduce GPS errors and thereby provide more accurate location tracking for the irrigation machine. Moreover, a technique is developed to monitor the operations of the power system so that the overall system reliability is improved.
The rapid progress of neural network technology makes it a popular kernel in many information processing systems, such as image recognition and natural language processing. In dealing with the huge workload of neural network computing, hardware platforms such as FPGA demonstrate advantages over software implementations. In FPGA implementations, placement plays a key role in determining circuit characteristics. Meanwhile, its long computation time is an important factor that makes the flexibility of FPGA computing much less competitive than software compiling. One observation is that neural network circuits can be realized in a regular systolic array. A particular example is systolic array-based neural network circuit design. In this work, FPGA placement exploiting design regularity is studied. For neural network designs with 64×64 systolic arrays, our proposed regularity-aware approach achieves over 25× speedup versus Versatile Place and Route (VPR) with limited circuit performance loss. At the same time, its solution quality is almost perfectly correlated with VPR and thus renders its role for early prototyping.
Subject
Information Processingerror correction
in-vehicle communication
smart irrigation
neural network
fast placement
Citation
Kong, Hongxin (2020). Information Processing Techniques, Hardware Design and Applications. Doctoral dissertation, Texas A&M University. Available electronically from https : / /hdl .handle .net /1969 .1 /192925.