Neural network processor including systolic array of two-dimensional layers
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The invention provides a pattern recognition processing apparatus and a technique for realizing a neural network of a complex structure within the processing apparatus. The apparatus includes a neural network having two-dimensional layers connected to form a feed-forward systolic array. Each two dimensional layer includes a feature extraction layer connected with a positional error absorbing layer. A host system provides inputs to the network. Each layer within the network includes processing elements such as a MOS analog circuit that receives input voltage signals and provides output voltage signals.
Yoneda, Hideki; Sanchez-sinencio, Edgar (1997). Neural network processor including systolic array of two-dimensional layers. United States. Patent and Trademark Office; Texas A&M University. Libraries. Available electronically from