Downlink W-CDMA performance analysis and receiver implmentation on SC140 Motorola DSP
Abstract
High data rate applications are the trend in today's wireless technology. W-CDMA standard was designed to support such high data rates of up to 3.84 Mcps. The main purpose of this research was to analyze the feasibility of a fixed-point implementation of the W-CDMA downlink receiver algorithm on a general-purpose digital signal processor (StarCore SC140 by Motorola). The very large instruction word architecture of SC140 core is utilized to generate optimal implementation, to meet the real time timing requirements of the algorithm. The other main aim of this work was to study and evaluate the performance of the W-CDMA downlink structure with incorporated space-time transmit diversity. The effect of the channel estimation algorithm used was extensively studied too.
Subject
CDMARake
rayleigh fading
space time coding
Star*Core
SC140
Channel Estimation
MRC Combining
Viterbi Decoding
Citation
Ghosh, Kaushik (2003). Downlink W-CDMA performance analysis and receiver implmentation on SC140 Motorola DSP. Master's thesis, Texas A&M University. Texas A&M University. Available electronically from https : / /hdl .handle .net /1969 .1 /169.