Now showing items 1-8 of 8

    • Area and energy efficient VLSI architectures for low-density parity-check decoders using an on-the-fly computation 

      Gunnam, Kiran Kumar (2009-05-15)
      The VLSI implementation complexity of a low density parity check (LDPC) decoder is largely influenced by the interconnect and the storage requirements. This dissertation presents the decoder architectures for regular and ...
    • A DSP embedded optical naviagtion system 

      Gunnam, Kiran Kumar (Texas A&M University, 2004-09-30)
      Spacecraft missions such as spacecraft docking and formation flying require high precision relative position and attitude data. Although Global Positioining Systems can provide this capability near the earth, deep space ...
    • Low density parity check decoder 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2020-04-07)
      A method and system for decoding low density parity check ("LDPC") codes. A method and system for decoding low density parity check ("LDPC") codes. An LDPC code decoder includes decoding circuitry configured to process ...
    • Low density parity check decoder 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2018-11-27)
      A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R ...
    • Low density parity check decoder 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2018-11-27)
      A method and system for decoding low density parity check (“LDPC”) codes. A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes decoding circuitry configured to process ...
    • Low density parity check decoder 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2015-08-18)
      A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R ...
    • Low density parity check decoder for irregular LDPC codes 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2013-10-08)
      A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes a control unit that controls decoder processing, the control unit causing the decoder to process the blocks of a low density ...
    • Low density parity check decoder for regular LDPC codes 

      Gunnam, Kiran Kumar; Choi, Gwan S. (United States. Patent and Trademark OfficeTexas A&M University. Libraries, 2014-02-18)
      A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R ...