Hardware Prototyping of Two-Way Relay Systems
In this thesis, I conduct the hardware prototyping of a two-way relay system using the National Instruments FlexRIO hardware platform. First of all, I develop several practical mechanisms to solve the critical synchronization issues of the systems, including Orthogonal Frequency-Division Multiplexing (OFDM) frame synchronization at the receiver, source to source node synchronization, and handshaking between the sources and relay nodes. Those synchronization methods control the behavior of the two source nodes and the relay node, which play critical roles in the two-way relay systems. Secondly, I develop a pilot-based channel estimation scheme and validate it by showing the successful self-interference cancellation for the two-way relay systems. In particular, I experiment the self-interference cancellation technique by using several channel estimation schemes to estimate both source to relay channels and relay to source channels. Moreover, I implement the physical layer of a 5 MHz OFDM scheme for the two-way relay system. Both the transmitter and receiver are designed to mimic the Long Term Evolution (LTE) downlink scenario. The physical layer of the transmitter has been implemented in Field-Programmable Gate Arrays (FPGAs) and executed on the hardware board, which provides high throughput and fundamental building blocks for the two-way relay system. The physical layer of receiver is implemented in the real-time controller, which provides the ?exibility to rapidly recon?gure the system. Finally, I demonstrate that the 5MHz OFDM based two-way relay system can achieve reliable communications, when the channel estimation and system synchronization can be correctly executed.
Wu, Qiong (2012). Hardware Prototyping of Two-Way Relay Systems. Master's thesis, Texas A&M University. Available electronically from