Design considerations for band-pass sigma-delta modulators

Abstract

Traditionally, the design of band-pass sigma-delta modulators is composed of two steps, the first at the system level and the second at the transistor level. The transition from the system level to the transistor level design involves degradation in performance due to circuit imperfections, the extent of which depends on the architecture. The degradation becomes even more significant if some of the underlying assumptions during the system level design cease to hold, even if that happens only for a fragment of the complete region of operation. A systematic understanding of the causes that might lead to an incorrect prediction of the performance at the transistor level, becomes essential for a robust and efficient design. Models that are simple enough for a design algorithm can sometimes bring about such discrepancies between predicted and transistor-level simulation results. Behavioral modeling serves as an intermediate step that not only gives a fairly accurate prediction of the performance of a design at the transistor level, but at the same time helps the designer to significantly expedite the optimization process. A representative set of architectures for band-pass modulator realization are identified and analyzed for: 1) non-ideal op-amp characteristics, 2) mismatch between capacitors and 3) circuit noise sources. The discussed architectures include the Cascade of Resonator in Feed-Back(CRFB), Cascade of resonators in Feed-Forward(CRFF), Cascade of Two Delay Resonators(CTDR) and N-path architectures. Systematic mathematical analysis as well as behavioral simulation results are presented that make possible an in-depth understanding of the effects as well as the significance of non-idealities to each of the above architectures. Behavioral building blocks are developed using SIMULINK/Matlab that are used to model and simulate the above architectures.