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dc.creatorKouba, Coy Kyleen_US
dc.descriptionDue to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to, referencing the URI of the item.en_US
dc.descriptionIncludes bibliographical references.en_US
dc.descriptionIssued also on microfiche from Lange Micrographics.en_US
dc.description.abstractThis research describes the development of an experimental radiation testing environment to evaluate the single event effects (SEE) susceptibility of the 486-DX4 microprocessor. SEE effects are caused by radiation particles that disrupt the logic state of an operating semiconductor, and include single event upsets (SEU) and latchup. The relevance of this work applies directly to digital devices that are used ill spaceflight computer systems. The 486-DX4 is a powerful commercial microprocessor that is currently under consideration for use in the International Space Station. As part of its selection process, it must be rigorously tested to determine its overall reliability in the space environment, including its radiation susceptibility. Thus, the goal of this research is to experimentally test and characterize the, single event effects of the 486-DX4 microprocessor using a cyclotron facility as the radiation source. The test philosophy is to focus on the "operational susceptibility" by executing real software and monitoring for errors while the device is under irradiation. This research encompasses both experimental and analytical techniques, and yields a characterization of the 486-DX4's behavior for different operating modes. Additionally, the test methodology can accommodate a wide range of digital devices, such as microprocessors, microcontrollers, and memory modules, for future testing The goals were achieved by testing with three ion species to provide different linear energy transfer values, and a total of six microprocessor parts were tested from two different vendors. A consistent set of error i-nodes were identified that indicate the manner in which the errors were detected in the processor. The upset cross-section curves were calculated for each error mode, and the SEU threshold and saturation levels were identified for each processor. Results show a distinct difference in the upset rate for different configurations of the on-chip cache, as well as proving that one vendor is superior to the other in terms of latchup susceptibility. Results from this testing were also used to predict the mean-time-to-fall for the 486-DX4 in several operating configurations of a space station environment.en_US
dc.publisherTexas A&M Universityen_US
dc.rightsThis thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use.en_US
dc.subjectelectrical engineering.en_US
dc.subjectMajor electrical engineering.en_US
dc.titleThe single event effect characteristics of the 486-DX4 microprocessoren_US
dc.typeThesisen_US engineeringen_US
dc.format.digitalOriginreformatted digitalen_US

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