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New methodologies for top-down statistical modeling and optimization of integrated circuits
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New methodologies intended to facilitate system level design and optimization are developed. Specifically, these methodologies allow: (1) development of system level models for the purpose of gathering statistical data on the performance of large systems and performance dependencies on sub-block parameters and (2) the development of system level top-down optimization strategies for hierarchical propagation of optimal sub-block performance specifications. Together, these new methodologies expand the current scope of Design for Quality, allowing statistical design and optimization techniques to be applied early in the product design cycle. In both of these areas, new methodologies, techniques and concepts are presented. In the area of system level modeling, criteria for judging model appropriateness are developed and explained. A new method of system level modeling intended for use in top-down investigations is introduced, exploiting the flexibility and efficiency of behavioral modeling techniques. A complicated IC system (a PLL filter tuning circuit) is thoroughly analyzed and models suited to a variety of analysis methods are developed and tested. Model examples using two behavioral modeling languages, Spectre and MAST, are developed to further demonstrate the validity of the methods introduced. In the area of top-down design, a new methodology suited to system level optimization tasks is introduced. The methodology relies on cost definitions and tolerance assignment originally proposed by M.A. Styblinski and the relevant algorithms developed for the optimal assignment of sub-block performance by A. Achab as a specifications. In addition, the nominal values of sub-block performances are optimized in order to improve the performance of the overall system while reducing sensitivity to sub-block performance variations. Two examples are investigated using the new methodology. The first example is a MOSFET-C bandpass filter, which utilizes macromodels and SPICE analysis to gain insights into the performance de pendencies of the system. The second example uses the models created for the PLL to complete a system level optimization and optimal specification assignment process using models developed and analyzed in the Saber environment. Following the development and verification of the new methodologies, conclusions are drawn, and possibilities for future work in the area are suggested.
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Alexander, Daniel D. (1996). New methodologies for top-down statistical modeling and optimization of integrated circuits. Master's thesis, Texas A&M University. Available electronically from
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