Show simple item record

dc.creatorNaik, Rajeshwaren_US
dc.date.accessioned2012-06-07T22:41:56Z
dc.date.available2012-06-07T22:41:56Z
dc.date.created1995en_US
dc.date.issued1995
dc.identifier.urihttp://hdl.handle.net/1969.1/ETD-TAMU-1995-THESIS-N343en_US
dc.descriptionDue to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item.en_US
dc.descriptionIncludes bibliographical references.en_US
dc.descriptionIssued also on microfiche from Lange Micrographics.en_US
dc.description.abstractCrossbar switches provide the maximum possible bandwidth and minimum possible latency of all interconnect structures. Due to the large area required for large switches, monolithic crossbars have usually been limited to 64 x 64 ports. But many applications such as shared memory multiprocessors, ATM switches and networks that carry visual information require high bandwidth and/or low latency to increase overall system performance. Large crossbar switches would be very useful in these applications. We propose a new design for a 256 x 256 port full crossbar switch for use in multiprocessor and telecommunications applications. The switch has a 50 Mbyte/sec bandwidth per port and a low message latency. Distributed arbitration is provided for output port contention. High packaging density, high speed, and I/O minimization are achieved through the use of a large area, defect-tolerant monolithic implementation in a 0.8 micron CMOS technology. The number of spare rows and columns in the switch matrix is determined by a detailed yield analysis. Index Terms-Crossbar switch 7 buffer, delay, interconnection networks, packet, clock cycle, arbitration, performance, priority, yield analysis, latch, decoder, packaging, ball grid array.en_US
dc.format.mediumelectronicen_US
dc.format.mimetypeapplication/pdfen_US
dc.language.isoen_USen_US
dc.publisherTexas A&M Universityen_US
dc.rightsThis thesis was part of a retrospective digitization project authorized by the Texas A&M University Libraries in 2008. Copyright remains vested with the author(s). It is the user's responsibility to secure permission from the copyright holder(s) for re-use of the work beyond the provision of Fair Use.en_US
dc.subjectelectrical engineering.en_US
dc.subjectMajor electrical engineering.en_US
dc.titleDesign and implementation of a large integrated crossbar switch for a 256 x 256 x 8 interconnection networken_US
dc.typeThesisen_US
thesis.degree.disciplineelectrical engineeringen_US
thesis.degree.nameM.S.en_US
thesis.degree.levelMastersen_US
dc.type.genrethesis
dc.type.materialtexten_US
dc.format.digitalOriginreformatted digitalen_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

This item and its contents are restricted. If this is your thesis or dissertation, you can make it open-access. This will allow all visitors to view the contents of the thesis.

Request Open Access