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dc.creatorJiang, Anxiao
dc.creatorLi, Yue
dc.creatorEn Gad, Eyal
dc.creatorLangberg, Michael
dc.creatorBruck, Jehoshua
dc.date.accessioned2019-06-17T17:14:04Z
dc.date.available2019-06-17T17:14:04Z
dc.date.issued2018-04-17
dc.identifier.urihttp://hdl.handle.net/1969.1/177240
dc.description.abstractBoth rewriting and error correction are technologies usable for non-volatile memories, such as flash memories. A coding scheme is disclosed herein that combines rewriting and error correction for the write-once memory model. In some embodiments, code construction is based on polar codes, and supports any number of rewrites and corrects a substantial number of errors. The code may be analyzed for a binary symmetric channel. The results can be extended to multi-level cells and more general noise models.en
dc.languageeng
dc.publisherUnited States. Patent and Trademark Office
dc.rightsPublic Domain (No copyright - United States)en
dc.rights.urihttp://rightsstatements.org/vocab/NoC-US/1.0/
dc.titleJoint rewriting and error correction in write-once memoriesen
dc.typeUtility patenten
dc.format.digitalOriginreformatted digitalen
dc.description.countryUS
dc.contributor.assigneeCalifornia Institute of Technology
dc.contributor.assigneeTexas A&M University System
dc.identifier.patentapplicationnumber14/443349
dc.date.filed2013-07-05
dc.publisher.digitalTexas A&M University. Libraries


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