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dc.contributor.advisorKarsilayan, Aydin I
dc.contributor.advisorSilva-Martinez, Jose
dc.creatorBommireddipalli, Aditya Vighnesh Ramakanth
dc.date.accessioned2018-02-05T16:48:40Z
dc.date.available2018-02-05T16:48:40Z
dc.date.created2017-08
dc.date.issued2017-05-17
dc.date.submittedAugust 2017
dc.identifier.urihttp://hdl.handle.net/1969.1/165708
dc.description.abstractThis work aims to model the effect of the input offset voltage of an operational amplifier on the performance of a high-precision, voltage-mode, resistor-based multiplying digital-to-analog converter (M-DAC). Based on the model, a high precision current buffer is proposed to isolate the resistor ladder from the operational amplifier. A 14-bit M-DAC operating with a ±1V reference of the proposed architecture. Post-layout simulations show that the proposed architecture reduces the offset voltage to an offset error in the DAC transfer function. The maximum DNL is maintained at -0.385 LSB for an input offset voltage of up to 60mV (1024 LSB). The current buffer also introduces an inversion of the output voltage, yielding a non-inverted output. This alleviates the need for an additional high precision op-amp to invert the output voltage.
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectDAC
dc.subjectinput offset voltage
dc.subjecthigh-precision
dc.subjectcurrent buffer
dc.titleDesign of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter
dc.typeThesis
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorTexas A & M University
thesis.degree.nameMaster of Science
thesis.degree.levelMasters
dc.contributor.committeeMemberKhatri, Sunil
dc.contributor.committeeMemberHur, Pilwon
dc.type.materialtext
dc.date.updated2018-02-05T16:48:40Z
local.etdauthor.orcid0000-0002-4353-4841


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